Async CPU/PCIE Clock
Possible values of an option:
The option description:
Defines, whether frequency of bus PCI Express together with frequency of the front-side bus ([Disabled]) should change synchronously, or bus PCI Express should clock independently from remaining buses ([Enabled]). The second variant is more preferable — you can fix normal working frequency of bus PCI Express (100 MHz) without dependence from a level of acceleration of the front-side bus.
Other options identical to destination: