CAS Latency (CL)
Possible values of an option:
Depend on storage type, there can be a variant [Auto] or [By SPD]
The option description:
Installs a time delay in clock periods between output of signal CAS and the data reading beginning (parameter tCL in the access chart). For the majority of qualitative units of storage of type SDRAM of standard PC66, PC100 and PC133 it is possible to install value . If stable operation in this case is not provided, lower value of an option to . For the modern units of storage DDR SDRAM this value is equal , [2.5] or , DDR2 SDRAM units and DDR3 SDRAM is characterized on the average by some great value — from  to  and from  to  accordingly. If there is a variant [Auto] or [By SPD], value CAS Latency undertakes from chip SPD. Setting greater time delays raises stability of operation of the computer, but negatively affects high-speed performance.
Memory latencies in most cases directly depend on frequency of the memory bus. The above this frequency, the is more than time delay. For example, typical PC2100 unit is characterized CAS Latency, equal 2, for PC2700 unit value 2.5 is more likely characteristic, well and the majority of normal PC3200 units have time delay CAS Latency equal 3. The similar tendency is present and at units of storage DDR2 SDRAM, DDR3 SDRAM. This remark is valid not only for CAS Latency, but also for all remaining time delays in the chart (formula) of access.
Other options identical to destination: