Option name:
DRAM tRCD Select
Possible values of an option:
Depend on storage type, there can be a variant [Auto]
The option description:
Time delay between signals RAS and CAS at reversal to storage cell (parameter tRCD in the access chart). For SDRAM there are enough [2] clock periods, but for problem units of storage it can be demanded to increase this value to [3]. If to speak about DDR SDRAM the time delay normally makes the same [2] or [3] clock periods. For DDR2 SDRAM values from [3] to [6] clock periods, and for DDR3 SDRAM — from [6] to [10] clock periods are characteristic. Some problem units of storage cannot work normally without setting certainly the worst values. Among possible values can be present and a variant [Auto] (the information undertakes from chip SPD).
Other options identical to destination:
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