INT Pin 2 Assignment

4/5 - (7 votes)
4/5 - (7 votes)

INT Pin 2 Assignment

Option name:

INT Pin 2 Assignment

Possible values of an option:

[Auto], [3], [5], [9], [10], [11]
Or
[Auto], [3], [4], [5], [7], [9], [10], [11]
Or
[Auto], [3], [4], [5], [7], [9], [10], [11], [12], [14], [15]

The option description:

Allows to assign manually interruption for signal line PIRQ 2 controlers of interruptions. Automatic selection of interruption (value [Auto]) will be an optimal variant in most cases.

Unlike direct assignment of priority interruption for this or that slot, the operations procedure at usage of this option is not so obvious. The expansion card for bus PCI (or PCI Express) can generate to 4 requests about interruptions (INT A# — INT D#). The core is INT A# (if it is occupied or it is required to a card more than one interruption, are used INT B#, behind it INT C# and, in the last queue, INT D#). We Give an example correspondences of signal lines of the controler of interruptions and requests.

Cabling for your motherboard is better for specifying in a manual. The resulted example — it is far not a unique variant.

Slots Signal lines
PIRQ 0 PIRQ 1 PIRQ 2 PIRQ 3
AGP INT A# INT B#    
PCI 1 INT A# INT B# INT C# INT D#
PCI 2 INT D# INT A# INT B# INT C#
PCI 3 INT C# INT D# INT A# INT B#
PCI 4 INT B# INT C# INT D# INT A#
PCI 5 INT B# INT C# INT D# INT A#

Thus, appropriating a controler signal line the interruption, we, actually, assign to its expansion card interposed into the slot, the main request for which — INT A#. We tell, if we want to assign interruption with number to 10 expansion card interposed into 3 slot, we should appropriate its lines PIRQ 2.

But there are also nuances. If the interruption already reserved for bus ISA is specified (at its presence), there will be a conflict of resources. Bus AGP uses requests INT A# and INT B#, dividing them with the first PCI slot. Thus, videocard AGP and an expansion card interposed into 1st PCI slot, will always use the same interruption. It does not result in conflicts, but can negatively affect high-speed performance of system. If an amount of PCI slots equally five 5th slot uses the same requests and, as consequence, interruption with the same number together with one of other 4 slots (in the variant shown above — with PCI 4) that, besides, can lower some the general high-speed performance of system if both of them are occupied. In the presence of six PCI slots combined there are already two pairs slots.

On different motherboards combined there are different slots. It can be 4th and 5th slots as in the resulted example, 1st and 5th, 2nd and 5th, etc., all depends on the vendor. Therefore the table of correspondence of signal lines of the controler of interruptions and requests is better for specifying in a manual to the motherboard.

Do not forget that old expansion cards for bus PCI, specifications PCI 2.0 corresponding only, are not able to divide a line of interruption with other device so, they need to be interposed or into the "single" slot, or to leave the second slot of "pair" empty. With expansion cards of specification PCI 2.1 also is higher such problems already is not present.

In the modern chipsets the amount of signal lines of the controler of interruption is increased to 8 that allows to dissolve expansion cards and the integrated controlers on different lines, considerably lowering probability of unstable operation or the conflict. We give an example possible correspondence.

Cabling for your motherboard is better for specifying in a manual. The resulted example — it is far not a unique variant.

Devices Signal lines
PIRQ 1 PIRQ 2 PIRQ 3 PIRQ 4 PIRQ 5 PIRQ 6 PIRQ 7 PIRQ 8
AGP slot INT A# INT B#            
Controler USB 1 INT A#              
Subsystem ACPI   INT B#            
Controler USB 2       INT B#        
Subsystem AC ’ 97   INT B#            
Controler LAN         INT A#      
Controler USB 3     INT C#          
The EHCI-controler               INT D#
PCI 1 slot          INT D# INT A# INT B# INT C#
PCI 2 slot          INT C# INT B# INT A# INT D#
PCI 3 slot  INT D# INT C# INT A# INT B#        
PCI 4 slot      INT B# INT A#   INT C# INT D#  
PCI 5 slot  INT C# INT A#     INT D#     INT B#
PCI 6 slot      INT A#   INT B# INT D# INT C#  

It was historically added that for old controlers of interruption with four lines numbering of lines normally began with zero, the modern decisions with восемью lines are numbered, as a rule, since unit. However, as practice showed, vendors of motherboards can use any variant of numbering.

Other options identical to destination:

PIRQ_2 Use IRQ No

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