SDRAM Idle Timer

5/5 - (10 votes)
5/5 - (10 votes)

SDRAM Idle Timer

Option name:

SDRAM Idle Timer

Possible values of an option:

[0 Cycle], [8 Cycle], [16 Cycle], [32 Cycle], [64 Cycle] and, probably, [Infinity]

The option description:

Shows quantity of steps during which all open pages of memory in the absence of references to them will be closed. In other words, this time of a finding of a line of memory in the buffer amplifier after reading operation before its record back in corresponding cells. Then, at the next reference to a memory cell, two variants are possible — if it already is in the buffer amplifier the data will be считаны with the minimum delays if it there is not present it is necessary to spend an extra time for page closing, and only after that to begin reading process. To estimate influence of this parametre on speed it is difficult enough. At chaotic data reading from memory (for example, work with databases) is optimum installation of the minimum values (can be, except [0 Cycle] — 0 steps), at consecutive (we will tell, processing of graphic files), on the contrary, provides the maximum speed deduction of page opened in a current of a considerable quantity of steps (besides, except for extreme value — [Infinity]). But anyway, the difference will make, a maximum, percent shares so it is possible to leave offered in the majority of chipsets a delay by default in [8 Cycle] (steps). Possible values — from [0 Cycle] (open pages of memory are closed at once after reading) to [16 Cycle], [32 Cycle] or, even, [64 Cycle]. In certain cases there is also a value [Infinity] — the page will not be closed the greatest possible time.

Other options identical to destination:

DRAM Idle Timer

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